Widely applied to various electronic products, a DC-to-DC converter provides the functions of regulating the voltage level from a DC input voltage, such as boost or buck voltage conversion, and of maintaining the regulated voltage at the desired level. Under the transient high slew rate load, the unbalanced current between the DC-to-DC converter and output load current is provided by filter capacitors. There are two voltage spikes under the transient load. The first output voltage spike relates to equivalent series resistance (ESR), equivalent series inductance (ESL) of filter capacitors and slew rate of the load; the second output voltage spike is determined by to the energy stored in filter inductance and filter capacitance. Commonly, a large number of bulk and ceramic capacitor mounted close to load is used to reduce the output impedance for voltage spikes suppression. But it is not a suitable solution for higher slew rate load; low output voltage high output current applications because of the cost and size limitation. Output voltage spikes are the products of the output impedance, or called load line, and the output current. High bandwidth of a converter and small output impedance helps to reduce its voltage spikes under high slew rate load and high bandwidth also helps to reduce its output impedance.
The bandwidth of a converter is mainly limited by three delay times: the filter inductor capacitance (LC) delay time, controller delay time, and propagation delay time. Examples of propagation delays in DC-to-DC converters include signal sensing delay, driver delay, control IC delay, and extra optocoupler delay in isolated DC-to-DC converter. The key limitation of the current slew rate of the converter is the equivalent filter inductance. A known solution for improving the output slew rate involves increasing the switching frequency to reduce the equivalent inductance. However, the increase in switching frequency results in deterioration of converter efficiency. An attractive solution is extra dynamic channel with high switching frequency operation because it only operates during transient periods.
Current injection topology, such as linear mode current injection topology and switching mode current injection topology, handles the transient current and the main converter handles the static current. It is an attractive extra dynamic channel for transient response improvement technique because this technique allows high slew rate current injection in step-up load and energy absorption in step-down load while the main converter maintaining an optimal converter design for improved efficiency.
FIG. 1 is a schematic diagram a DC-to-DC converter including a main converter 12 and incorporating a linear mode current injection topology 14 according to the prior art. The linear mode current injection topology 14 solution injects high slew rate current ILin to the DC-to-DC converter 10 during step-up operation and clamps the output voltage VO using resistive dissipation. However, the efficiency of the DC-to-DC converter 10 is reduced due to the large conduction loss in linear mode current injection topology related with the high voltage drop (Vin−VO) and the high current stress (IO−Ip).
FIG. 2 is a schematic diagram of switching mode current injection topology 16 of the prior art. Switching mode current injection topology 16 operates at high frequency to reduce the filter inductance Lsw to achieve a high slew rate current Isw injection during step-up load as a buck converter. During step-down operation recycles energy to the input voltage V1 as a boost converter. However, switching mode current injection topology results in a large power loss due to high current stress (IO−Ip) combined with the high switching frequency operation.
The high power loss resulting from use of current injection topology is the impediment to wide scale application because the imbalance between the output current and the current provided by the main converter all conduct through the current injection topology. For current injection topology, a large conduction loss in linear mode 14 or switching loss in switching mode 16 results due to the high current stress and the high switching frequency. For these reasons, current injection topology is not a good solution for high slew rate current, high efficiency power conversion application, especially for converters having low voltage, high current output.
The present invention advances the art by providing a method, system, apparatus and device for reducing the output impedance for voltage spikes suppression by providing an active transient voltage compensator for use with isolated or non-isolated DC-to-DC converters. The active transient voltage compensator injects the voltage source instead of the current source in prior arts current injection topology. During transient periods, the active transient voltage compensator provides high slew rate current due to small leakage inductance of the transformer.